Solid state surge suppressor

ABSTRACT

Solid-state circuitry for arresting surges on a D-C power line. The circuitry includes a non-linear resistor connected in series with a normally nonconductive thyristor across the power line. The thyristor is automatically triggered into conduction in response to a signal which is a function of the magnitude and the rate of rise of the surge. The thyristor is rendered nonconductive by an oscillatory circuit including a capacitor when the surge voltage drops below a first predetermined level if the voltage on the capacitor is above a second predetermined level.

United States Patent 1191 St. Clair [54] SOLID STATE SURGE SUPPRESSORJohn G. St. Clair, Folcroft, Pa.

[73] Assignee: General Electric Company, Philadelphia, Pa.

[22] Filed: June 22, 1972 [21] App]. No.: 265,288

[75] Inventor:

[56] References Cited UNITED STATES PATENTS 14 1 Apr. 24, 1973 Fallon eta1 ..3 17/16 Greenwood ..317/1 1 B Primary Examiner.lames D. TrammellAttorney-J. Wesley l-laubner et a1.

[57] ABSTRACT 3,246,206 4/1966 Chowdhuri...- 17/16 x 8 Claims, 4 Drawinggur 3,309,575 3/1967 L68 61; a1 ..3l7/6l.5

Y -Ja 3 4a J6 I 1 1 I 15 H 1 V 415 46 7R5 i 1 i i .L -15 h a v I J0 J6J7 I LOAD fl. C. POWER SUV/F65 Patented Apia 24, 1973 2 Sheets-Sheef 1SOLID STATE SURGE SUPPRESSOR BACKGROUND AND OBJECTS OF THE INVENTION Thepresent invention relates to electrical protective devices and moreparticularly to solid stage voltage surge responsive protecting devicesfor direct current power systems. The following published art, now knownto applicant, is exemplary of prior art approaches relevant in this areaof technology: US. Pat. Nos. 3,230,459Loya; 3,246,206-Chowdhuri;3,309,575-Lee et al; 3,375,405Fallon et al; 3,435,288-Greenwood; and3,569,784-Carrol.

In many D-C power systems, surge suppressing circuitry is commonlyconnected across the power source to protect the system and itscomponents from external (e.g., lightning) and internal (e.g.,switching) surges. This is particularly true in power systems utilizingsolid stage components such as diodes and thyristors since suchcomponents do not have much margin for safely withstanding voltagesabove their normal operating voltage. Accordingly, protection of asystem against transient overvoltages or voltage surges requires thatthe suppressing circuitry be able to reduce the transient overvoltage tosafe values below the breakdown level of the system components.

In the above noted Chowdhuri patent, which is assigned to the sameassignee as my invention, there is disclosed solid stage surgesuppressing circuitry which may be connected across a D-C bus and whichis adapted to quickly suppress any surge arising thereon. In severalembodiments disclosed therein a solid stage switching element and anon-linear resistor having a negative current-resistance characteristicare connected in series with one another across a D-C bus in a powersystem. In the absence of a voltage surge in the power system theswitching element is normally nonconductive, thereby ensuring that thesurge suppressor does not drain any power from the system power source.Should a voltage surge ,develop in the power system and attain apreestablished magnitude the switching element is automatically renderedconductive to provide a path through which the surge current flows andis dissipated. As the voltage on the non-linear resistor builds up andexceeds the bus voltage the magnitude of the surge is reduced and itsenergy is dissipated as heat in the non-linear resistor.

As per Chowdhuris disclosure a buffer capacitor is connected in shuntwith the non-linear resistor in order to disconnect the suppressor fromthe bus after dissipation of the surge. To that end Chowdhuri notes thatimmediately after the surge is dissipated the voltage on the capacitoris equal to the voltage drop across the non-linear resistor due to thesurge and is of opposite polarity to the polarity of the switchingelement thereby rendering the switching element non-conductive. Thisaction prevents the flow of line current through the surge suppressorafter the surge has been dissipated.

In some D-C power systems (e.g., systems having large line inductanceand highavailable surge current levels), I have found that if thevoltage level at which the switching elements of prior art surgesuppressors are rendered conductive is too low, the voltage whichappears on the surge suppressor may be insufficient to drive the surgecurrent to zero quickly. Accordingly,

the suppressor will remain on longer. The longer the suppressor remainson in arresting the surge, the more energy is drawn from the systemvoltage source, which energy will flow through the suppressorsconducting non-linear resistor. This action may unnecessarily heat thenon-linear resistor.

If, on the other hand, the voltage level at which the surge suppressorswitching element is rendered conductive is established at a relativelyhigh level so as to enable the surge to be arrested quickly, damage tothe system components may result in arresting surges having a fast rateof rise (e.g., 3 volts per microsecond), such damage being caused byexcessive overshoot on the non-linear resistor.

It is a general object of my invention to provide a solid stage surgesuppressor particularly adapted for use in electrical power systems inwhich voltage surges having differing rates of rise may occur.

It is a further object of my invention to provide, in a solid statesurge suppressor including a non-linear resistor, a novel turn oncircuit adapted for turning the suppressor on without the danger ofexcess heating of or excess voltage overshoot on the non-linearresistor.

. In some circumstances solid stage surge suppressors utilizing buffercapacitors to disconnect the suppressor from the bus like thosedisclosed by Chowdhuri may exhibit problems in turning off. For example,if the surge energy is relatively low, the voltage on the buffercapacitor connected in shunt with the non-linear resistor may notsufficiently exceed the voltage on the D- C bus to ensure the successfulturn off of the solid state switching element. In such an event thesuppressor will drain power from the DC power supply. This isparticularly true if the solid state switching element is a thyristor.To obviate such problems turn off or commutating circuitry can beprovided to positively turn off the solid state switching element in thesurge suppressor thereby effectuating the disconnect of the suppressorfrom the system power supply.

As is known a thyristor is a solid state device including a body orwafer having four distinct layers of semiconductor material (silicon)with contiguous layers being of different conductivity types to formthree back-to-back PN (rectifying) junctions in series. Thesemiconductor body is disposed between a pair of main current carryingelectrodes. When connected in series with a load impedance and a sourceof forward voltage, a thyristor will ordinarily block appreciablecurrent flow between its main electrodes until it is triggered by theinjection of a sufficient number of minority carriers into certain ofits junction areas, whereupon it abruptly switches from the highimpedance to a very low impedance, forward con-ducting, turned-on statewhereby load current conduction commences. When forward current flowingthrough the device is subsequently reduced below a certain holdinglevel, the device begins to turn off, whereupon load current conductiontherethrough ceases. In an A-C system the device will automatically turnoff at the end of each periodic con-ducting interval when the loadcurrent goes to zero. In a D-C system, however, turn-off means, commonlyknown as commutation means, must be provided to force a current zerothrough the device to enable it to turn off. A short period of timeafter termination of current through the device a sufficient number ofminority carriers will have been swept from the junctions thereof andthe device will regain its forward voltage blocking ability. This shortperiod of time is known as the turn off" time of the device and is afunction of several parameters inherent in the device (e.g., theimpurity concentration in the semiconductor layers).

When a thyristor is used as the switching element in a solid state surgesuppressor for a D-C system it is of major importance to ensure that theinterval between a cessation of current through the device and thereapplication of forward voltage thereon, which interval is determinedby the configuration of the turn-off circuit, is longer than theinherent turn-off time of the device to ensure that once turned off thedevice remains off until it is subse-quently retriggered.

Accordingly, it is a further object of my invention to provide a solidstage surge suppressor adapted for use in a D-C power system andincluding turn off circuitry to ensure that the suppressor is positivelydisconnected from the system after suppressing any surges which mayarise therein.

SUMMARY OF THE INVENTION In carrying out my invention in one form Iprovide in a D-C power system a solid state surge suppressor including athyristor connected in series with a nonlinear resistor. Turn-oncircuitry, operative in response to the detection of a system voltagesurge, is provided to render the switch conductive, which actionconnects the non-linear resistor in the system for arresting the surge.The turn on circuitry is arranged to turn the thyristor on at lowersurge voltage levels for fast rising surges than for slow rising surges.Turn-off circuitry is provided to turn the thyristor off when sufficientsurge energy has been dissipated. The turn off circuitry includescommutation means operative when actuated from a conditioned state fordriving the current flowing through the thyristor to zero and means foractuating the commutating meansfThe actuating means includes circuitrywhich ensures that the commutating means is not actuated until it isconditioned and until the system voltage drops below a predeterminedlevel.

BRIEF DESCRIPTION OF THE DRAWINGS My invention will be better understoodand its various objects and advantages will be more fully appreciatedfrom the following description taken in conjunction with theaccompanying drawing in which:

FIG. 1 is a schematic diagram of a solid state surge suppressor inaccordance with my invention;

FIG. 2a is a graphical representation of the operation ofa portion ofmysurge suppressor;

FIG. 2b is a graphical representation of a condition which my inventionobviates;

FIG. 20 is a graphical representation of a condition which my inventionobviates.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT Referring to FIG. 1there is shown a D-C power system including a D-C power source I forsupplying power to a remote load 2 via a D-C bus 3. A static switch orcircuit breaker 4 is connected in the bus 3 between the source 1 and theload 2 and is adapted for interrupting the-flow of current to the loadupon command. The static switch 4 is shown schematically as including apower thyristor 4a shunted by a circuit including a capacitor 4b and aserially connected thyristor 4c. Triggering means (not shown) areprovided to render thyristor 4a conductive and thereby enable current toflow from the power source to the load.

Once conductive thyristor 4a will continue to conduct until the level ofcurrent flowing therethrough drops ,below a predetermined thresholdlevel. Since the circuit shown in FIG. 1 is a D-C circuit means areprovided to drive the current flowing through the power thyristor tozero (i.e., create an artificial current zero) to turn the thyristoroff. Such turn off means are known in the art as commutating means andthey can take many forms. One common form is shown in FIG. 1 andincludes capacitor 4b, called a commutating capacitor, and a seriallyconnected thyristor 4c, called a commutating thyristor. The commutatingcapacitor is charged to the potential whose polarity is shown. In US.Pat. No. 3,098,949-Goldberg there is shown and claimed means forcharging the commutating capacitor of a static switch. The commutatingthyristor is poled in opposition to the polarity of the power thyristor4a and is adapted to be rendered conductive upon being triggered byassociated trigger means (not shown).

Operation of the commutating means is as follows: upon being triggered,the commutating thyristor begins conducting whereupon energy stored inthe commutating capacitor discharges in the reverse direction throughthe power thyristor. This action quickly drives the load current flowingthrough the power thyristor to zero whereupon it turns off and the flowof load current therethrough is interrupted. As the power thyristorturns off load current, which heretofore had been flowing through it, isdiverted through the commutating circuitv thereby charging thecommutating capacitor. When the commutating capacitor is charged upfully the further flow of current therethrough is precluded and the flowof current to the load is interrupted.

The commutating thyristor triggering means is controlled by manual means(not shown) as well as by automatic' fault current detecting means (notshown). The manual means is operative for effectuating the interruptionof the flow of normal load current through the power thyristor inresponse to a manual OFF signal whenever such interruption is desired.The automatic fault current detecting means is operative foreffectuating the interruption of the flow of an abnormal or faultcurrent through the power thyristor in high speed response to itsdetection.

The power system shown schematically in FIG. 1 may represent varioustypes of power systems such as traction systems (i.e., electric poweredrailways), underground mine power systems, etc. In such systems the D-Cbus between the power source 1 and the static switch 4 is relativelylong.

As is known all electrical power lines exhibit some inherent inductance,called the line inductance. The line inductance between the power source1 and the static switch 4 in the power system of FIG. 1 is shownschematically as lumped inductor 3a and is called the line-sideinductance. The line inductance between the static switch and the load 2is called the load-side inductance and [being the current flowingtherethrough) will be stored in the line-side inductance during theperiod that the static switch 4 is conducting. When, in response to acommand, the static switch is turned off the stored inductive energywill try to discharge current through the static switch. This actionresults in charging the commutating capacitor to a voltage level equalto the V L/C X I (L being the large line-side inductance, I being thecurrent therethrough and C being the commutating capacitor capacitance).If the commutating capacitor is made large enough (i.e., has alargevalue of capacitance) the voltage to which it will be charged can bekept relatively low. However, commutating capacitors large enough tokeep the voltage thereon relatively low in large power systems (e.g.,600 volts) are expensive. if smaller commutating capacitors areutilized, the voltage which will build up on the commutating capacitordue to the stored inductive energy may exceed the breakdown voltage ofthe power thyristor thereby causing it to break over and becomeconductive. Such action can result in damage to the thyristor.

in order to protect the power thyristor of the static switch from theapplication thereto of excessive voltage levels without necessitatingthe use of large and expensive commutating capacitors, a surgesuppressor 5 is connected in series with a diode 6 across the D-C bus inthe vicinity of the static switch.

The surge suppressor 5 is the subject matter of my invention and is asolid state device adapted for the suppression of transient switchingsurges (e.g., surges which result from the opening of static switch 4)as well as externally imposed surges (e.g., lightning surges).

The basic elements of my D-C surge suppressor are a diverting circuit 7including a buffer capacitor 8 shunting the series connection of anon-linear resistor 9 and a controllable switching element or thyristor10, a turn on circuit 11 for the switching element 10 to connect thediverting circuit 7 to the D-C bus 3, a commutating circuit 12 includinga commutating thyristor l3 and an inductor I l-capacitor l5 composedoscillatory circuit to turn off the controllable switching element 10 soas to disconnect the diverting circuit from the D-C bus upon thedissipation of the surge and a triggering circuit 16 for the commutatingcircuit 12.

The non-linear resistor displays a negative currentresistancecharacteristic (i.e., high resistance at low currents and low resistanceat high currents). Siliconcarbide resistors display such acharacteristic. One type of silicon-carbide resistor made by GeneralElectric Company under the trade name of Thyrite has been found to bedesirable and has been used as an embodiment of applicants invention.

The surge suppressor operates generally as follows: upon the occurrenceof a voltage surge (e.g., switching surge or externally originatedsurge) attaining a preselected triggering level which is a function ofthe rate of rise of the surge voltage the turn on circuit 11 triggersthyristor 10 into conduction, whereupon the diverting circuit 7 isconnected across the D-C bus. This enables the surge current to flowthrough the parallel paths forming the diverting circuit (i.e., one pathbeing the buffer capacitor 8 and the other path being the series circuitof non-linear resistor 9 and thyristor 10), thereby building up voltageon the diverting circuit. The build-up of voltage on the divertingcircuit has the effect of decreasing the magnitude of thesurge-produced-current flowing through the bus and the non-linearresistor acts to dissipate the surge energy. When the commutatingcircuit capacitor voltage is above a preselected level and the busvoltage has dropped below a predetermined level the triggering circuitl6 triggers the commutating thyristor 13 into conduction. This actionenables the capacitor in the oscillatory circuit to discharge throughthe diverting circuit thyristor 10 to turn it off. The surge currentceases flowing through the non-linear resistor and diverting circuitthyristor path but continues to flow through the buffer and commutatingcapacitors until it is fully charged at which time no further surgecurrent will flow therethrough.

The above described action limits the surge voltage to a predeterminedlevel and dissipates its energy. If excessive line-side inductive energyremains in the system after the diverting circuit thyristor is turnedoff the voltage which builds up on the buffer capacitor will exceed thetriggering voltage level of the turn-on circuit 11. As such, the entireoperation as described above will be repeated until the voltage whichfinally appears on the buffer capacitor is lower than the turn oncircuit triggering level.

In accordance with one aspect of my invention the voltage level at whichthe turn-on circuit operates decreases as therate of rise of the voltagesurge increases. In the presence of slow rising surges the turn oncircuit operates at a maximum voltage level. This action precludesoperation of the turn on in response to low magnitude surges which donot warrant suppression. By suitably choosing the minimum voltage levelat which the turn on circuit should operate in the presence of thefastest expectable rising voltage surge voltage overshoot on thenon-linear resistor can be minimized, thereby protecting the thyristorsin the static switch from over-voltage induced damage. For example, in a600 volt D-C power system including a static switch composed ofthyristors having a breakdown voltage rating of 1400 volts and whereinthe maximum rate of rise of exceptable voltage surges isapproximately 3volts per microsecond (which surges occur when the static switch tripsin response to a short circuit fault condition) and the minimum rate ofrise of such voltage surges is less than 0.3 volt per microsecond (whichsurges occur when the static switch is manually opened), I have foundthat for the fastest rising surges the turn on circuit should operate atapproximately 950 volts and the operating voltage level should increaseto approximately 1200 volts for the slowest rising surges. This actionwill effectively limit voltage overshoot on the non-linear resistor tobelow 1400 volts, thereby protecting the static switch thyristors fromovervoltage breakdown.

To accomplish that end the turn on circuit includes a frequencydependent attenuator. As can be seen the attenuator comprises resistors18 and 19 which are connected to from a resistance-voltage divider whoseinput is provided across the series connection of both resistors andwhose output is provided across resistor 19. The attenuator alsocomprises capacitors and 21 connected to form a capacitive voltagedivider whose input is provided across the series connection of bothcapacitors and whose output is provided across capacitor 21. The inputsof both voltage dividers are connected in parallel with one another andform the input of the attenuator 17. The input of the attenuator isprovided with a voltage appearing across the diverting circuit 7 whichis approximately equal to the surge voltage (neglecting the slightforward voltage drop of diode 6). The outputs of both dividers areconnected in parallel with one another and form the output of theattenuator.

The attenuator is operative to attenuate the voltage appearing at itsinput and to provide the attenuated voltage at its output. The voltageappearing at the output of the attenuator is detected by means whichwill be described later, and if it exceeds a preselected level itresults in the tripping of the diverting circuit thyristor 10. Thedegree of attenuation of the input voltage by attenuator 17 (i.e., theamount that the magnitude of the input voltage is decreased by theattenuator) is a function of the rate of rise of the voltage appearingat the attenuator input: the greater the rate of rise of the inputvoltage the lower the degree of attenuation.

As should be appreciated, in the presence of fast rising surges thedegree of attenuation of attenuator 17 will be primarily established bythe capacitor-voltage divider whereas for surges of slower rates of risethe degree of attenuation will be primarily established by theresistor-voltage divider. The values of the resistors and the capacitorsshould be carefully chosen so that the degree of attenuation for fastrising surges is slightly less than, i.e., approximately 80 percent of,the degree of attenuation for slower rising surges. In so doing theattenuator enables the turn-on circuit to operate at higher voltagelevels for slower rising surges than for fast rising surges, whichaction precludes conduction of the diverting thyristor in the presenceof very low magnitude voltage surges which present no danger to thesystem and which do not warrant suppression by the surge suppressor. Tothat end, when utilized in power systems like the example givenpreviously, the values of the components making up the attenuator are asfollows:

resistor 18 100 K ohm,

resistor 19 4.4 K ohm, capacitor 20 .006 microfarads capacitor 21 .12microfarads The output of the attenuator is coupled to level sensitivemeans comprising a four-layer-breakdown diode 22. One side of diode 22is connected to the attenuator output and the other side of thebreakdown diode is connected to an inductor 23 and to one side of aresistor 24. The other side of resistor 24 is connected to a diode 25which in turn is connected to the control or gate electrode ofthyristor10.

When the output voltage of the attenuator attains the breakdown voltagelevel (e.g., 50 volts) of diode 22, current commences flowing throughthe diode 24, whereupon, by means of the illustrated gate electrode,thyristor 10 is caused to turn on or become conductive. Resistor 24 isprovided to limit the current flowing into the gate of thyristor 10 anddiode 25 is provided to prevent the gate-to-cathode voltage which isgenerated in the thyristor 10 as it turns on from causing the breakdowndiode to breakdown in the reverse direction. The

inductor 23 is provided such that it and capacitor 21 form anoscillatory circuit which begins to oscillate when diode 22 breaks down.The resulting oscillation effectuates turn-off of the breakdown diodeshortly after it beings conduction, thereby removing the triggeringsignal from the gate electrode of thyristor 10.

Commutating circuit 12 is provided as the means for turning offthyristor 10 when sufficient surge energy has been dissipated. Circuit12 includes the series connection of commutating thyristor 13, inductor14 and capacitor 15 and is connected in shunt with thyristor 10. Oneside of capacitor 15 is connected to the cathode of thyristor l0 and theother side of capacitor 15 is connected, via resistor 26, to thepositive D-C bus 3. When connected thusly, capacitor 15 is charged bythe D-C bus via resistor 26.

The inverse parallel combination of commutating thyristor 13 and diode27 form a bidirectional solid state switch. In order to protect thebidirectional switch from excessive dv/dt, the switch is shunted byprotective means 28 like that shown and claimed in U.Si Pat. No.3,489,927 (Kelley Jr., et al) and assigned to the same assignee as myinvention and including a main resistance-capacitance circuit, theresistance portion of which is shunted in turn by an auxiliaryresistancecapacitance circuit having a much shorter time constant.

Operation of the commutating circuit and the turnoff sequence itself canbest be understood with reference to the graph of FIG. 2a as well as theschematic diagram of FIG. 1. It will be understood that the turn-offsequence begins when the commutating thyristor 13 is triggered after anappropriate period of conduction by the main thyristor 10. My improvedmeans 16 for providing the trigger signal for thyristor 13 will bedescribed soon hereinafter. In FIG. 2 it is assumed that this signaloccurs at time T whereupon the commutating thyristor begins conductingand energy previously stored in the charged commutating capacitor l5begins discharging therefrom. The commutating capacitor and the inductor14 form an oscillatory circuit so that the current I discharging fromthe commutating capacitor 15 is oscillatory in nature. The first halfcycle of the oscillatory current will flow anode-tocathode through theconducting thyristor 10 via the series path of the commutating thyristor13, inductor 14 and capacitor 15. The voltage appearing on thyristor 10is denoted as V As the current reverses (i.e., during the next halfcycle of oscillatory current I the net anode-to-cathode current throughthyristor 10 will drop below the-holding level whereupon the device willbegin to turn off. At the time that the thyristor 10 ceases conductingthe voltage appearing on the com- .mutating capacitor 15 (denoted as Vwill be approximately equal to its maximum negative value and will alsoappear on the thyristor 10 in the reverse direction (i.e.,cathoderto-anode). Immediately thereafter, the commutating capacitorbegins recharging to its original polarity from the remaining surgecurrent I; flowing via a diode 27 which is connected in shunt withcommutating thyristor 13 but is poled in opposition thereto. A shorttime after the voltage on the capacitor 15 becomes positive the turnedoff thyristor 10will be forward biased again.

At the time thyristor l ceases conducting, surge current begins flowinginto the buffer capacitor 8. In the case of a relatively low energysurge (e.g., a surge resulting from a non-faulted opening of the staticswitch) the buffer capacitor will not charge to the turnon circuittriggering level before it blocks the passage of further currenttherethrough. If the surge energy is however relatively high (e.g., asurge resulting from the static switch opening in response to a shortcircuit in the load) the buffer capacitor may charge to the triggerlevel of circuit whereupon the entire surge suppressing operation as hasbeen previously described will reoccur.

The time it takes for the commutating capacitor to charge to thepositive polarity during the turn on sequence is referred to as theavailable turn off time". So long as the available turn off time islonger than the inherent turn off time of the thyristor lO it willremain off notwithstanding the reapplication of forward bias thereto. Mytriggering circuit 16 for the commutating thyristor 13 assures thatresult.

In a solid state surge suppressor having a surge current divertingcircuit made up of an energy dissipating element (e.g., non-linearresistor 9) in series with a thyristor, it is of utmost importance toensure that once the thyristor begins to turn off it does turn off andremains off until it is subsequently retriggered. Should the thyristorfail to remain off (i.e., become conductive as soon as forward voltageis applied thereto) it will reconnect the diverting circuit to the powerbus thereby resulting in a power drain from the system power supply.

To accomplish the above noted objective, my turnoff circuit monitorscertain system conditions which will materially affect the time at whichforward voltage is reapplied to thyristor l0 (i.e., the available turnoff time) during the turn off sequence. To best illustrate thoseconditions reference should be made to FIG. 2 which are graphicalrepresentations of voltages and currents flowing in selected parts ofthe surge suppressor during the turn off sequence.

Should the voltage appearing on the commutating capacitor at thebeginning ofa turn off sequence be too low, the magnitude of oscillatorycurrent I available for driving the current through thyristor 10' belowthe holding level may be insufficient for that task and the thyristorwill not begin to turn off.

Even if the potential V on capacitor is of sufficient magnitude toensure that the current through thyristor 10 is driven below its holdinglevel the capacitor voltage may be too low to ensure that the thyristorwill remain off when forward voltage is reapplied thereto. Thiscondition is shown graphically in FIG. 212. As can be seen therein thevoltage V' (which represents the voltage on capacitor 15 and is of a lowmagnitude than the voltage V shown in FIG. 2a) will reach positivepolarity prior to voltage V notwithstanding that the rate of charge ofcapacitor 15 in the conditions shown in FIG. 2a and 2b is the same (therate of charge is directly proportional to the magnitude of the surgecurrent I; flowing through diode 27) since the maximum negativeexcursion of voltage V is less than the corresponding excursion ofvoltage V The oscillatory circuit is lightly damped. The maximumnegative excursion of voltage V is approximately equal to the positivevoltage to which capacitor 15 was charged at time T If, as the caseshown in FIG. 2b, the voltage on capacitor 15 is not of sufficientmagnitude to ensure that the available turn-offtime (i.e., the time ittakes for capacitor 15 to charge from its maximum negative voltage tozero) is longer than the inherent turn offtime of the device at aparticular surge current level, the thyristor 10 will begin conductingwhen the voltage on capacitor 15 is again positive.

Even if the voltage on the commutating capacitor is sufficiently high,if the turn off sequence is begun too soon after thyristor 10 isrendered conductive, the level of surge current flowing through thediverting circuit will be relatively high. Such a condition is shown inFIG. 2c. As can be seen therein when thyristor 10 ceases conducting thehigh level of surge current I' rapidly charges commutating capacitor 15to positive polarity from its maximum negative excursion level. The rateof which commutating capacitor 15 is charged by the high surge currentremaining reduces the available turn-off time from the condition shownin FIG. 2a to that shown in FIG. 2c, whereby the available turn off timeis shorter than the inherent turn off time of thyristor 10. Accordingly,in such a condition thyristor 10 will begin conducting anew as soon asthe voltage on capacitor 15 is of positive polarity.

My triggering circuit 16 monitors both the magnitude of the voltageappearing on the commutating capacitor and the magnitude of the surgevoltage remaining and does not trigger the commutating circuit until thevoltage appearing on the commutating capacitor is above a preestablishedlevel at a time when the magnitude of the remaining voltage surge isbelow a preestablished level. This action 'results in a reliable turnoff operation. Such an operation is shown graphically in FIG. 2a.

The details of my triggering circuit which effectuate the abovedescribed ends are shown in the schematic diagram of FIG. 1. As can beseen therein, triggering circuit 16 includes two voltage dividers, 29and 30.

' Voltage divider 29 is composed of resistors 31, 32, 33,

34, 35, 36, 37 and 38 and includes an input which is provided across theseries combination of resistors 31-38 and an output which is providedacross resistor 31. All of the resistors 31-38 are of equal value andare precision resistors to minimize the effects of temperaturevariations.

The input of voltage divider 29 is connected across non-linear resistor9. The divider 29 monitors the magnitude of the non-linear resistorvoltage and provides an output signal or voltage which is proportionalto the instantaneous magnitude of the input voltage. The voltageappearing on non-linear resistor 9 (and hence on the input to voltagedivider 29 during the period that thyristor 10 is conducting) issubstantially the mag- I nitude of the surge voltage, which voltage is afunction of the magnitude of the surge current i flowing through thesurge suppressor. The output of voltage divider 29 indicates if themagnitude-of the voltage surge is too high for a reliable turn-offoperation.

Voltage divider 30 is composed of resistors 39 and 40 and includes aninput which is provided across the series connection of resistors 39 and40 and an output which is provided across resistor 39. The input tovoltage divider 30 is connected across commutating thyristor 13. Asshould be appreciated, when thyristor is conducting the voltageappearing anode-tocathode on commutating thyristor 13 will be thevoltage to which commutating capacitor is charged. Accordingly, voltagedivider 30 will monitor the voltage appearing on capacitor 15. Thesignal or voltage appearing at the output of voltage divider 30 isproportional to the magnitude of the voltage on capacitor 13. A zenerdiode 41 is connected in shunt with the output of voltage divider 30 tolimit or clamp the voltage appearing thereat to a fixed value wheneverthe input voltage on the voltage divider (i.e., the voltage on capacitor15) is at a sufficient magnitude to effectuate reliable thyristorturn-off.

Circuitry 42 is provided coupled to the outputs of the voltage dividers29 and 30 for comparing the voltages appearing at their respectiveoutputs and for triggering thyristor 13 whenever the clamped voltage atthe output of divider 30 exceeds the voltage at the output of divider 29by a predetermined value. To that end circuitry 42 includes a capacitor43 connected in shunt with zener diode 41, a four-layer-breakdown diode44 having one side connected to one side of capacitor 43 and the otherside connected to one side of primary winding 45 of a pulse transformer.The other side of the transformer primary is connected to the anode ofdiode 46. The cathode of diode 46 is connected to one side of capacitor47 shunting the output of voltage divider 29. The transformer includes asecondary winding 48 which is connected across the gate and cathodeelectrodes ofthe commutating thyristor l3.

Capacitor 43 charges to the clamp voltage appearing at the outputvoltage divider 30 and this voltage appears at one side, denoted as sideA, of breakdown diode 44. The output voltage of voltage divider 29 iscoupled via capacitor 47, diode 46 and transformer primary 45 to theother side, denoted as side B, of the breakdown diode. When the voltageappearing on side B of diode 44 exceeds the voltage on side A by theinherent breakdown voltage of the diode, the diode begins to conduct,whereupon energy stores in capacitor 43 discharges through the temporaryimpedance path composed of breakdown diode 44, primary winding 45, diode46 and capacitor 47. The discharging current through primary winding 45results in current being supplied to the gate of thyristor 10 to renderit conductive, thereby initiating commutation or turn off of divertingcircuit thyristor 10.

While I have shown and described a particular embodiment of myinvention, it will be obvious to those skilled in the art that variouschanges and modifications may be made without departing from myinvention in its broader aspects; and I, therefore, intend herein tocover all such changes and modifications as fall within the true spiritand scope of my invention.

What I claim as new and desire to secure by Letters Patent of the UnitedStates is:

1. In an electric system for supplying D-C power from a voltage sourceto an electric load, a solid-state voltage surge suppressor connectedacross said source for limiting the magnitude of voltage surges to apredetermined maximum and for dissipating their energy, said suppressorcomprising:

a. non-linear resistance means having a negative current-resistancecharacteristic;

b. normally non-conductive controllable electric switch means connectedin series circuit relationship with said non-linear resistance means;

c, triggering means operative in response to a voltage surge across saidseries circuit for rendering said electric switch conductive when thepotential of said surge attains a preselected level which is is afunction of the rate of rise of said surge, said triggering meanscomprising:

i. frequency dependent attenuating means, having an input and an output,for attenuating a voltage provided at its input which represents thevoltage across said series circuit to provide an out put voltage ofreduced magnitude at said output, the degree of attenuation of saidinput voltage decreasing as the rate of rise of the input voltageincreases, said attenuating means comprising a resistor-composed-voltagedivider connected in parallel with a capacitor-composed-voltage di'vider, the values of the resistors and capacitors in said attenuatingmeans being such that the degree of attenuation for a fast rising inputvoltage is slightly less than the degree of attenuation for a slowrising input voltage; and

ii. level sensitive means coupled to the output of said variableattenuating means for rendering said switch means conductive when theoutput voltage reaches a preestablished level; and

d. turn-off means for automatically causing said electric switch meansto cease conducting.

2. The suppressor as specified in claim 1 wherein the degree ofattenuation for a fast rising input voltage is approximately percent ofthe degree of attenuation for a slow rising input voltage.

3. The suppressor as specified in claim 2 wherein said electric switchmeans comprises a thyristor.

4. in an electric system for supplying D-C power from a voltage sourceto an electrical load, a solid state surge suppressor connected acrosssaid source for arresting surges in the system while limiting suchsurges to a predetermined maximum, said suppressor comprismg:

a. non-linear resistance means having a negative current-resistancecharacteristic;

b. a normally non-conductive thyristor connected in series circuitrelationship with said non-linear resistance means, said thyristor beingrendered conductive in automatic response to a voltage surge across theseries circuit;

c. means for automatically causing said thy-ristor means to ceaseconducting comprising:

i. an oscillatory circuit including a capacitor and an inductorconnected in shunt with said thyristor via a normally non-conductiveelectric switch; and

ii. triggering means for rendering said electric switch conductive whenthe magnitude of the voltage surge drops below a first preselected levelif the voltage appearing on the capacitor of the oscillatory circuit isabove a second preselected level.

5. The suppressor as specified in claim 4 wherein said triggering meanscomprises first means for providing a first signal which is a functionof the instantaneous magnitude of the surge, second means coupled tosaid oscillatory circuit capacitor for providing a second signalwhenever the voltage on said capacitor is above said second preselectedlevel and third means coupled to said first and second detector meansfor rendering said switch conductive whenever the second signal exceedsthe first signal by a preestablished value.

6. In an electrical system for supplying D-C power from a voltage sourceto an electrical load, a solid state surge suppressor connected acrosssaid voltage source for arresting surges in the system while limitingsuch surges to a predetermined maximum, said suppressor comprising:

a. non-linear resistance means having a negative current-resistancecharacteristic;

b. a normally non-conductive thyristor connected in series with saidnon-linear resistance means, said thyristor being rendered conductive inautomatic response to the existence of a surge in said system;

c. first triggering means operative in response to the presence of asurge for providing a trigger signal to render said thyristorconductive, said triggering means comprising:

i. frequency dependent attenuating means, having an input and an output,for attenuating a voltage provided at its input which represents thevoltage across said series circuit to provide an output voltage at saidoutput, the degree of attenuation of said input voltage decreasing asthe rate of rise of the input voltage increases, said attenuating meanscomprising a resistor composed voltage divider connected in parallelwith a capacitor composed voltage divider, the valves of the resistorsand capacitors in said attenuating means being such that the degree ofattenuation for a fast rising input voltage is slightly less than thedegree of attenuation for a slow rising input voltage; and

ii. level sensitive means coupled to the output of said voltage dividingmeans for providing said trigger signal when the attenuated outputvoltage reaches a preestablished level; and

d. automatic means for causing said first thyristor to cease conductingcomprising:

i. an oscillatory circuit including a capacitor and an inductorconnected in shunt with said thyristor via a normally non-conductiveelectric switch; and

ii. second triggering means for rendering said electric switchconductive when the magnitude of the surge drops below a firstpreselected level if the voltage appearing on the capacitor of theoscillatory circuit is above a second preselected level.

7. The suppressor as specified in claim 6 wherein the degree ofattenuation for a fast rising input volta e is approximately of thedegree of attenuation or a

1. In an electric system for supplying D-C power from a voltage sourceto an electric load, a solid-state voltage surge suppressor connectedacross said source for limiting the magnitude of voltage surges to apredetermined maximum and for dissipating their energy, said suppressorcomprising: a. non-linear resistance means having a negativecurrentresistance characteristic; b. normally non-conductivecontrollable electric switch means connected in series circuitrelation-ship with said non-linear resistance means; c. triggering meansoperative in response to a voltage surge across said series circuit forrendering said electric switch conductive when the potential of saidsurge attains a preselected level which is is a function of the rate ofrise of said surge, said triggering means comprising: i. frequencydependent attenuating means, having an input and an output, forattenuating a voltage provided at its input which represents the voltageacross said series circuit to provide an output voltage of reducedmagnitude at said output, the degree of attenuation of said inputvoltage decreasing as the rate of rise of the input voltage increases,said attenuating means comprIsing a resistor-composed-voltage dividerconnected in parallel with a capacitor-composedvoltage divider, thevalues of the resistors and capacitors in said attenuating means beingsuch that the degree of attenuation for a fast rising input voltage isslightly less than the degree of attenuation for a slow rising inputvoltage; and ii. level sensitive means coupled to the output of saidvariable attenuating means for rendering said switch means conductivewhen the output voltage reaches a preestablished level; and d. turn-offmeans for automatically causing said electric switch means to ceaseconducting.
 2. The suppressor as specified in claim 1 wherein the degreeof attenuation for a fast rising input voltage is approximately 80percent of the degree of attenuation for a slow rising input voltage. 3.The suppressor as specified in claim 2 wherein said electric switchmeans comprises a thyristor.
 4. In an electric system for supplying D-Cpower from a voltage source to an electrical load, a solid state surgesuppressor connected across said source for arresting surges in thesystem while limiting such surges to a predetermined maximum, saidsuppressor comprising: a. non-linear resistance means having a negativecurrent-resistance characteristic; b. a normally non-conductivethyristor connected in series circuit relationship with said non-linearresistance means, said thyristor being rendered conductive in automaticresponse to a voltage surge across the series circuit; c. means forautomatically causing said thy-ristor means to cease conductingcomprising: i. an oscillatory circuit including a capacitor and aninductor connected in shunt with said thyristor via a normallynon-conductive electric switch; and ii. triggering means for renderingsaid electric switch conductive when the magnitude of the voltage surgedrops below a first preselected level if the voltage appearing on thecapacitor of the oscillatory circuit is above a second preselectedlevel.
 5. The suppressor as specified in claim 4 wherein said triggeringmeans comprises first means for providing a first signal which is afunction of the instantaneous magnitude of the surge, second meanscoupled to said oscillatory circuit capacitor for providing a secondsignal whenever the voltage on said capacitor is above said secondpreselected level and third means coupled to said first and seconddetector means for rendering said switch conductive whenever the secondsignal exceeds the first signal by a preestablished value.
 6. In anelectrical system for supplying D-C power from a voltage source to anelectrical load, a solid state surge suppressor connected across saidvoltage source for arresting surges in the system while limiting suchsurges to a predetermined maximum, said suppressor comprising: a.non-linear resistance means having a negative current-resistancecharacteristic; b. a normally non-conductive thyristor connected inseries with said non-linear resistance means, said thyristor beingrendered conductive in automatic response to the existence of a surge insaid system; c. first triggering means operative in response to thepresence of a surge for providing a trigger signal to render saidthyristor conductive, said triggering means comprising: i. frequencydependent attenuating means, having an input and an output, forattenuating a voltage provided at its input which represents the voltageacross said series circuit to provide an output voltage at said output,the degree of attenuation of said input voltage decreasing as the rateof rise of the input voltage increases, said attenuating meanscomprising a resistor composed voltage divider connected in parallelwith a capacitor composed voltage divider, the values of the resistorsand capacitors in said attenuating means being such that the degree ofattenuation for a fast rising input voltage is slightly less than thedegree of attenuation for a slow rising input voltage; and ii. levelsensitive means coupled to the output of said voltage dividing means forproviding said trigger signal when the attenuated output voltage reachesa preestablished level; and d. automatic means for causing said firstthyristor to cease conducting comprising: i. an oscillatory circuitincluding a capacitor and an inductor connected in shunt with saidthyristor via a normally non-conductive electric switch; and ii. secondtriggering means for rendering said electric switch conductive when themagnitude of the surge drops below a first preselected level if thevoltage appearing on the capacitor of the oscillatory circuit is above asecond preselected level.
 7. The suppressor as specified in claim 6wherein the degree of attenuation for a fast rising input voltage isapproximately 80% of the degree of attenuation for a slow rising inputvoltage.
 8. The suppressor as specified in claim 6 wherein said secondtriggering means comprises first means detector for providing a firstsignal which is a function of the instantaneous magnitude of the surge,second means coupled to said oscillatory circuit capacitor for providinga second signal whenever the voltage on said capacitor is above saidsecond preselected level and third means coupled to said first andsecond means for rendering said switch conductive whenever the secondsignal exceeds the first signal by a preestablished value.